SBC Gen 7 Single Board Computers

The Frontgrade SBC Gen 7 Single Board Computer seamlessly integrates high-performance processing with flexible interfaces. Its SWaP-C optimized design is ideal for small form factor distributed space processing and small satellite C&DH.

Frontgrade’s 7th Generation Single Board Computer (SBC7) is based on our rad-hard and TRL 9 GR712 Dual Core LEON3FT SPARC V8 processor. This SBC can deliver up to 180 DMIPS of processing performance in a compact 1U PC104 (100mm x 94mm), stackable form factor, making it well suited for small spacecraft Command and Data Handling (C&DH) or distributed and edge payload processing applications. Its flexible design features a dual-level stacking mezzanine connector allowing support hardware like I/O expansion, telemetry and power supply cards to be stacked above and below the SBC7 to create a complete embedded computing subsystem.

Frontgrade’s SBC Gen 7 can be delivered with several options and with several parts pedigrees to target Class A through D missions. VxWorks 6.7 BSP is available for the SBC, and other OS and BSPs can be supported per customer demand. 

Some key features and attributes of the SBC7 include:

• Dual-core LEON3FT GR712RC microprocessor with up to 180 DMIPS processing speed at up to 90MHz system clock rate
       ○ Branch prediction and on-the-fly error correction resulting in 30%
           performance increase compared to single-core LEON3FT
       ○ 4x4 Kbytes instruction and data cache
       ○ On-chip Debug Unit with instruction and AHB (advance 
           high-performance bus) trace buffers
       ○ Microprocessor JTAG debug link
       ○ Flight Reconfigurable ProASIC3L Flash family FPGA with customizable 
           firmware to meet mission specific customer requirements
• VxWorks 6.7 compatible Board Support Package with native driver support for I 2C and NAND Flash controllers and OS agnostic bootloader
• EDAC-protected Memories:
        ○ 384MB SDRAM and controller (or 3Gbit) with Reed-Solomon EDAC 
            protection (16-bit word level 256MB User Data Space +128MB EDAC)
        ○ 32MB NOR Flash and controller with BCH EDAC protection (16-bit word level)
        ○ 8GB or 16GB density options for user data NAND Flash with Hamming 
            EDAC protection (64-bit word level)
        ○ 192 KB microprocessor OCM and controller with BCH EDAC protection 
            (16-bit word level)
• System-level functions and features:
        ○ 6 X General Purpose Timers (2 with time latch capability)
        ○ FPGA Watchdog and Timekeeping timers
        ○ Fault Detection and Mitigation Unit (FPGA)
        ○ Supports up to four FSW boot images with image selection
        ○ Interfaces with IRIS and ACS systems (Star Tracker, IMU, Sunsors, 
           Cold Gas)
• Interfaces:
        ○ 2x SpaceWire links with RMAP (GR712RC)
        ○ Up to 8x Asynchronous RS422 serial links with added Mezzanine Card
        ○ 4x SPI Master Ports (up to 16 slave-select bits)
        ○ Single I2C multi-master core, with 7-bit or 10-bit mode slave-select 
            addressing (GR712RC)
        ○ 32 GPIO (18 on GR712RC and 14 on FPGA)
        ○ Up to 26 analog channels with added Mezzanine Card
        ○ Up to 24 high-precision current sources with added Mezzanine Card
        ○ 2x JTAG Interface (GR712 and FPGA)
        ○ Ethernet Interface (GR712RC)